In an operation of processing a silicon wafer having a number of vias through the silicon wafer and attaching a die including the silicon wafer to a substrate, an air void may be introduced in one or more of the vias in a material used to fill the vias. The air void may result in an inconsistency in the operational characteristics of the device. For example, the vias through the silicon wafer may provide through wafer interconnects and conductive contacts on both sides of the wafer. An air void in the material filling the vias may result in a non-uniform ground or potential plane and electrical discontinuities.
In some instances, the number and distribution of the vias over an area of the silicon wafer may vary, thereby contributing to a complexity in filling the vias in a consistent manner.
Thus, there is a general need for an efficient and reliable via filling mechanism.